The present invention relates generally to electronic circuits, and, more particularly, to a bidirectional voltage translator.
Integrated circuits, such as system-on-chips (SoCs) and application specific integrated circuits (ASICs), often have multiple voltage domains that operate at different voltage levels. Level shifters or voltage translators are used as an interface between the voltage domains to resolve voltage incompatibility of signals passing from one domain to another.
FIG. 1 illustrates a conventional bidirectional voltage translator 100 that is used as an interface between first and second voltage domains that operate at first and second voltage levels VCCA and VCCB, respectively. The voltage translator 100 receives a first voltage signal V1 from the first voltage domain via a first input/output (I/O) terminal A. The first voltage signal V1 has a first high state equal to the first voltage level (e.g., 1.8V), and a first low state equal to ground. The voltage translator 100 shifts the first voltage signal V1 to generate a second voltage signal V2 at a second I/O terminal B, where the second voltage signal V2 has a second high state equal to the second voltage level (e.g., 3.6V) and a second low state equal to ground. In the other direction, the voltage translator 100 receives the second voltage signal V2 from the second voltage domain via the second I/O terminal B, level shifts it, and transmits the level shifted signal as the first voltage signal V1 to the first voltage domain via the first I/O terminal A.
The voltage translator 100 includes first and second one-shot circuits 102a and 102b, first and second output transistors OT1 and OT2, first and second resistors R1 and R2, a gate bias circuit 104, and a pass transistor PT. The first one-shot circuit 102a includes a first monostable multi-vibrator 106a and a first driver circuit 108a and the second one-shot circuit 102b includes a second monostable multi-vibrator 106b and a second driver circuit 108b. 
The pass transistor PT and the first multi-vibrator 106a receive the first voltage signal V1. The pass transistor PT is controlled by the gate bias circuit 104 based on the first voltage signal V1. For example, when the first voltage signal V1 is low, the pass transistor PT is activated, and the second voltage signal V2 is generated at the second low state. Conversely, when the first voltage signal V1 is high, the pass transistor PT is off.
When the first voltage signal V1 goes from low to the first high state, the first multi-vibrator 106a generates a first one-shot pulse signal p1. The first one-shot pulse signal p1 is high active and is activated for a first pulse duration. The first driver circuit 108a receives the first one-shot pulse signal p1 and generates a first driver signal d1 to drive the first output transistor OT1. The first driver signal d1 is an inverted version of the first pulse signal p1. The first driver signal d1 hence is low active and is activated for the first pulse duration.
The first output transistor OT1, which is a p-channel metal oxide semiconductor (PMOS) transistor, is activated for the first pulse duration. When the first output transistor OT1 is activated, the second voltage signal receives the second supply voltage VCCB, so the first high state is level shifted to the second high state, thereby generating the second voltage signal V2. Similarly, when the second voltage signal V2 goes from high to low, the second one-shot circuit 102b, the second output transistor OT2, the second resistor R2, and the pass transistor PT generate the first voltage signal V1.
The pulse width of the signal generated by the first one-shot is constant, which can be problematic. For example, if the time that the first voltage signal V1 is high is less than the first one-shot pulse duration, then after V1 goes low, which activates the pass transistor PT, so the second voltage signal V2 goes low. However, as the first one-shot pulse has not elapsed, the first output transistor OT1 remains active, and hence, the second voltage signal V2 remains at the second high state. Thus, the voltage translator 100 will malfunction when the length of time the first voltage signal is high is less than the width of the pulse of the first one-shot.
Therefore, it would be advantageous to have a voltage translator that controls the pulse width of driver signals that drive its output transistors.